3rd Workshop on design of Low Power EMbedded Systems
Co-located with ACM International Conference on Computing Frontiers 2017
May 15 – 17, 2017, Siena, Italy
AIM and SCOPE
Modern cyber-physical and highly networked systems impose to designers challenging and conflicting requirements. Implementing real-time high-performance systems and minimizing, contemporarily, their power consumption is not straightforward. Emergent and unpredictable behaviours require these systems to adapt at runtime to mutable conditions. Therefore, advanced modelling strategies as well as efficient design automation techniques should be capable of optimizing complex parallel applications over heterogeneous multi- and many-cores platforms. Complexity on algorithmic side and heterogeneity on hardware side are colliding system constraints, which can be tackled by adopting hw/sw co-design solutions and flexible design frameworks.
With respect to this context, contributions are expected in different fields of digital signal processing such as: telecommunication, multimedia, medical imaging, computing graphics, biomedical applications and many others!
Papers may include, but are not limited to, the following topics:•High-level synthesis and HW/SW co-design techniques for low-power digital signal/image processing;
Design of self-energy aware systems;
Design space exploration techniques, with special emphasis on power/energy estimations and power minimization methodologies;
Parallel/high throughput processing techniques for low-power digital signal/image processing;
Algorithm-level optimization, low-complexity algorithm for low-power digital signal/image processing;
MPEG Green Metadata;
Approximate computing, low power arithmetic
Dynamic voltage and frequency scaling, HW and SW dynamic power management.
Abstract due: February 24, 2017 (Extended deadline)
Submission due: February 24, 2017 (Extended deadline)
Notification of acceptance/rejection: March 21, 2017
Submission of camera-ready papers and registration: April 6, 2016